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陳全
副教授
15546891485
chenq3@sustech.edu.cn

陳全博士,南方科技大學(xué)深港微電子學(xué)院副教授(研究員),博士生導(dǎo)師,深圳市海外高層次人才。畢業(yè)于香港大學(xué)電機(jī)電子工程系,曾任美國加州大學(xué)圣迭戈分校(UCSD)博士后和香港大學(xué)研究助理教授,2019年加入南方科技大學(xué)深港微電子學(xué)院。主要研究領(lǐng)域為電子設(shè)計自動化(EDA)領(lǐng)域的先進(jìn)算法及工具,重點(diǎn)應(yīng)用于超大規(guī)模模擬和射頻電路仿真,后摩爾時代多物理場分析以及基于量子物理的新一代納米器件仿真等。獲2012年ICCAD最佳論文獎提名,2020年吳文俊人工智能芯片獎二等獎,入選深圳市孔雀團(tuán)隊。先后主持和主要參與包括國自然重點(diǎn)、國自然面上、國自然專項和廣東省重大研發(fā)計劃在內(nèi)的多項縱向研究項目。主持多項與華為、華大九天和國微集團(tuán)等EDA龍頭企業(yè)合作的橫向項目。在EDA領(lǐng)域頂級期刊和會議上發(fā)表學(xué)術(shù)論文50余篇(包括TCAD、DAC、ICCAD等),連續(xù)數(shù)年擔(dān)任DAC會議和ICCAD會議(EDA領(lǐng)域兩大頂級會議)技術(shù)程序委員會(TPC)成員。中國仿真協(xié)會集成微系統(tǒng)建模與仿真專委。擁有4項中國發(fā)明專利。

 

招聘信息

陳全課題組常年招聘博士后、科研助理,招收博士生、碩士生、訪問研究生、本科實習(xí)生,有意應(yīng)聘者請將簡歷發(fā)送至以下郵箱,以“招聘崗位_應(yīng)聘者姓名”為題。

聯(lián)系方式:chenq3@sustech.edu.cn

 

教育經(jīng)歷

2010年,香港大學(xué),博士

2007年,香港大學(xué),碩士

2005年,中山大學(xué),學(xué)士

 

工作經(jīng)歷

2025年5月至今,南方科技大學(xué),副教授

2019年4月至2025年4月,南方科技大學(xué),助理教授

2012年11月至2018年12月,香港大學(xué),研究助理教授

2011年12月至2012年10月,香港大學(xué),博士后研究員

2010年10月至2011年11月,加州大學(xué)圣迭戈分校(UCSD),博士后研究員

 

研究簡介

大規(guī)模先進(jìn)模擬/射頻電路仿真方法

后摩爾時代多物理分析技術(shù)

AI輔助的EDA技術(shù)

 

所獲榮譽(yù)

2020吳文俊人工智能科學(xué)技術(shù)獎二等獎

2012 ICCAD最佳論文獎提名

 

代表文章

Journal paper:

1. L. Ouyang, C. Jin and Q. Chen, "A Recycling Krylov Subspace Method With High-Order Time Integration Methods for Fast Periodic AC and Noise Analysis," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, no. 9, pp. 4180-4188, Sept. 2024, doi: 10.1109/TCSI.2024.3410384. 

2. L. Ouyang, C. Jin and Q. Chen, "A Fast Recycling GMRES Method With Smart Frequency Sweeping for Efficient Periodic Small-Signal Analysis," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 8, pp. 3765-3769, Aug. 2024, doi: 10.1109/TCSII.2024.3372404

3. Tao, Chaofan; Lin, Rui; Q. Chen; Zhang, Zhaoyang; Luo, Ping; Wong, Ngai, “FAT: Frequency-Aware Transformation for Bridging Full-Precision and Low-Precision Deep Representations”, IEEE Transactions on Neural Networks and Learning Systems, vol. 35, no. 2, pp. 2640 - 2654, Feb.2024

4. Yao Tong; Q. Chen, “Analytical Modeling of Multiple Co-Existing Inaccuracies in RF Controlling Circuits for Superconducting Quantum Computing”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 43, no. 1, pp. 319 - 323, Jan.2024

5. Cong Wang; Dongen Yang; Jinming Lyu; Yong Dai; Cheng Zhuo; Q. Chen, “On Model Order Reduction and Exponential Integrator for Transient Circuit Simulation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 43, no. 1, pp. 328 - 339, Jan.2024

6. T. Hou, N. Wong, Q. Chen, Z. Ji and H. -B. Chen, Analytical Post-Voiding Modeling and Efficient Characterization of EM Failure Effects Under Time-Dependent Current Stressing," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 12, pp. 4959-4972, Dec. 2023.

7. Tianshu Hou; Peining Zhen; Ngai Wong; Q. Chen; Guoyong Shi; Shuqi Wang; Hai-Bao Chen,“Multilayer Perceptron-Based Stress Evolution Analysis Under DC Current Stressing for Multisegment Wires," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 2, pp. 544-557, Feb. 2023

8. D. Liu and Q. Chen, "TEMT: A Transient Electronic–Magnetic–Thermal-Coupled Simulation Framework for STT-MTJs," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 5, pp. 1623-1633, May 2023.

9. Dingbang Liu; Haoxiang Zhou; Wei Mao; Jun Liu; Yuliang Han; Changhai Man; Qiuping Wu; Zhiru Guo; Mingqiang Huang; Shaobo Luo; Mingsong Lv; Q. Chen; Hao Yu, "An Energy-Efficient Mixed-Bit CNN Accelerator With Column Parallel Readout for ReRAM-Based In-Memory Computing," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 12, no. 4, pp. 821-834, Dec. 2022.

10. Tianshu Hou; Ngai Wong; Q. Chen; Zhigang Ji; Hai-Bao Chen, “A Space-Time Neural Network for Analysis of Stress Evolution under DC Current Stressing”,IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 12, pp. 5501-5514, Dec. 2022.

11. Q. Chen, “EI-NK: A Robust Exponential Integrator Method with Singularity Removal and Newton-Raphson Iterations for Transient Nonlinear Circuit Simulation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,vol. 41, no. 6, pp. 1693-1703, June 2022

 

Conference paper:

1. H. Zhou and Q. Chen, “EI-PIT: A Parallel-in-Time Exponential Integrator Method for Transient Linear Circuit Simulation”, 2024 IEEE/ACM International Conference On Computer Aided Design (ICCAD), USA, Oct. 2024.

2. H. Zhou, D. Yang, Y. Lin, Y. Dai and Q. Chen, "A Parallel Acceleration Technique based on Bordered Block Diagonal Matrix Reordering for Exponential Integrator Method," 2024 2nd International Symposium of Electronics Design Automation (ISEDA), Xi'an, China, 2024, pp. 94-99, doi: 10.1109/ISEDA62518.2024.10617631.

3. Geng Bai, Jinming Lyu, Yangfei Lin, Xingming Liu, Yong Dai, Dongen Yang, Lingyun Ouyang, Cong Wang, Q. Chen, "Back-Scaling Based Exponential Integrator Method with Multi-Process Parallel Processing for Transient Power/Ground Network Analysis," 2023 International Symposium of Electronics Design Automation (ISEDA), Nanjing, China, May 2023.

4. Y. Sha, J. Lan, Y. Li and Q. Chen, "A Physics-Informed Recurrent Neural Network for RRAM Modeling," 2023 International Symposium of Electronics Design Automation (ISEDA), Nanjing, China, May 2023.

5. C. Wang, D. Yang and Q. Chen, "EI-MOR: A Hybrid Exponential Integrator and Model Order Reduction Approach for Transient Power/Ground Network Analysis," 2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD), San Diego, CA, USA, Oct. 2022.

6. Q. Chen, “A Robust Exponential Integrator Method for Generic Nonlinear Circuit Simulation”, Design Automation Conference (DAC), San Francisco, Jul. 2020.

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